Enhanced Black Diamond reduces interconnect resistance and strengthens chips for 3D stacking (Image: AMAT)
By Ron Wilson
What’s at stake:
2 nm process nodes will require novel transistors and will push the limits of EUV lithography. But if the interconnect can’t scale as well as the transistors, the new processes will deliver neither the speed, nor the density, nor the power savings designers are seeking.
As the leading edge of the semiconductor manufacturing industry — that is, Intel, Samsung, and TSMC — grinds inexorably toward the 2 nm process node, there has been much discussion of new kinds of transistors and of the new demands on EUV lithography. But another element of process technology is equally critical to the success of 2nm, and equally hard to scale: the interconnect wires that connect the transistors into circuits, and the circuits into functional blocks.