By Junko Yoshida
Led by Reuters, several media outlets this week suggested that “Synopsys seeks to acquire Ansys.”
The status of negotiations between the two companies, or even if there are negotiations, is unconfirmed by The Ojo-Yoshida Report. Both companies have kept mum. According to Reuters, other companies appear to be also pursuing Ansys.
So, what’s behind this Synopsys/Ansys romance?
The likeliest link is the electronics industry’s growing appetite for chiplets.
The idea of implementing a tiny IC – each containing a well-defined subset of functions – in a “Lego-like” mix-and-match assembly has become the rage among users and designers of SoCs.
The chiplet is expected to disaggregate the way semiconductors are designed, manufactured, and distributed. Some even anticipate that the emerging chiplet trend, if it takes hold, poses the potential to dismantle the existing ecosystem of EDA companies, SoC suppliers, semiconductor customers, foundries, Outsourced Semiconductor Assembly and Test (OSAT) companies and distributors.
Multi-physics issues
For Synopsys, one of the most aggressive prospectors in the chiplet rush, Ansys represents an effective solution in enabling chip designers to deal with multi-physics issues.
With this shifting landscape in mind, Synopsys has been taking steps throughout 2023 to strengthen its partnerships with Ansys.
Multi-die systems present unique challenges to chip designers. Most designers of conventional monolithic chips are not accustomed to considering a range of physical effects – from thermal analysis to electromagnetic interference and advanced 3D physical effects. Until the emergence of multi-die systems, multi-physics problems were treated as an afterthought in chip design.
With this shifting landscape in mind, Synopsys has been taking steps throughout 2023 to strengthen its partnerships with Ansys.
Ansys and Synopsys are already working to integrate their flagship products to smooth the chiplet design flow.
Synopsys stated in its announcement, “Ansys’ RedHawk-SC family of industry-leading power integrity, thermal, and reliability signoff products have been integrated with Synopsys’ Fusion Compiler platform, 3DIC Compiler platform and PrimeTime signoff platform to provide customers golden signoff accuracy for chip, package, and system-level effects within the Synopsys design environment.”
Separately, to strengthen “ecosystem collaboration” needed to advance multi-die systems, Synopsys hammered out a deal with Taiwan Semiconductor Manufacturing Co. (TSMC) and Ansys earlier this year.
Striving to improve autonomous systems’ performance with new mmWave reference flow, Synopsys also joined with Ansys and Keysight to collaborate with TSMC.
In a recent interview with The Ojo-Yoshida Report, Shekhar Kapoor, a senior director of product line management for Synopsys’ EDA Group, called “inevitable” the imperative for chip designers to deal upfront with “all the different thermal, mechanical and electrical characteristics, which we call multi-physics issues” when designing multi-die systems.
Naturally, noted Kapoor, it is critical that Synopsys — as an EDA company — provides design flows that can automate multi-physics analysis in designing chiplets.
Kapoor explains in an upcoming video podcast called “Dig Deeper on Chiplet Series” (Episode: EDA’s Role) Synopsys’ outlook on industry collaborations including the Ansys partnership. Register here to save your seat to tune into the video podcast scheduled on Jan. 17, 2024.
Junko Yoshida is the editor in chief of The Ojo-Yoshida Report. She can be reached at junko@ojoyoshidareport.com
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