By Ron Wilson

What’s at stake:
Intel has bet its chance to catch TSMC at the 1.4 nm node on being the first user of high-NA EUV lithography. It is a short road full of challenges, but early results look promising.

Lithography giant ASML announced this month that they have successfully printed a dense line pattern with 10 nm spacing, using the world’s first production high-NA EUV lithography system. In itself this is just another milestone in a long development schedule for ASML — similar patterns have already been printed using laboratory equipment. But in the global competition between Intel and TSMC for Angstrom-era semiconductor dominance, the announcement looms across the horizon like the first hints of dawn.

By Junko Yoshida

What’s at stake:
A lot rides on Japan’s first and only foundry company. Rapidus recently received an additional $3.9 billion in government aid. Included in the subsidies are a package that will help Rapidus grow into developing back-end packaging – in a country where no OSAT companies exist. Rapidus has yet to prove its 2nm process technology for front–end volume chip production. Is it trying to do too much?

Many factors contributed to the eventual downfall of the Japanese semiconductor industry. The Japanese industry languished in the1990s largely because of the prolonged US-Japan semiconductor trade war. A mixture of hubris and obsession drove Japan’s pursuit of higher quality DRAMs, while paying little attention to the demand by PC manufacturers looking for “good enough” memory. (Japan missed the tide of a growing PC market.) Finally, Japan, which dominated the global semiconductor market in the ’80s with DRAMs – Japan’s specialty then – never succeeded in converting its technology prowess to microprocessors and logic devices. 

Since then, the lessons Japanese government and semiconductor executives have learned could influence the outcome of Japan’s “renaissance” in chip manufacturing